The present invention is directed to an improved low resistivity silicon carbide. More specifically, the present invention is directed to an improved low resistivity silicon carbide that has a high nitrogen concentration.
Silicon carbide (SiC), especially silicon carbide produced by chemical vapor deposition (CVD), has unique properties that make it a material of choice in many high temperature applications. Chemical vapor deposition processes for producing free-standing silicon carbide articles involve a reaction of vaporized or gaseous chemical precursors in the vicinity of a substrate to result in silicon carbide depositing on the substrate. The deposition reaction is continued until the deposit reaches the desired thickness. To be free standing, the silicon carbide is deposited to a thickness of upward of 0.1 mm. The deposit is then separated from the substrate as a free-standing article that may or may not be further processed by shaping, machining, or polishing and the like to provide a final silicon carbide article.
In a chemical vapor deposition silicon carbide production run, a silicon carbide precursor gas, such as a mixture of methyltrichlorosilane (MTS), hydrogen and argon, is fed to a deposition chamber where the mixture is heated to a temperature at which the mixture reacts to produce silicon carbide. Hydrogen scavenges chlorine that is released from the MTS when the MTS dissociates during the reaction. An inert, non-reactive gas such as argon or helium is employed as a carrier gas for MTS (a liquid at room temperature). Inert gases also act as a diluent whose flow rate can be varied to optimize the reaction and assures removal of by products from the reaction/deposition zone. The silicon carbide deposits as a layer or shell on a solid mandrel provided in the deposition chamber. After the desired thickness of silicon carbide is deposited on the mandrel, the coated mandrel is removed from the deposition chamber and the deposit separated therefrom. The monolithic free-standing article may then be machined to a desired shape. Several CVD-SiC deposition systems are described in U.S. Pat. Nos. 5,071,596; 5,354,580; and 5,374,412.
Pure CVD-SiC has relatively high electrical resistivity. While this is a desirable characteristic for certain applications, such a characteristic is a limitation restricting its use in other applications. Certain components, such as plasma screens, focus rings used in plasma etching chambers need to be electrically conductive, and edge rings and susceptors used in the RTP systems need to be opaque and possess high temperature stability. While high temperature properties of CVD-SiC have made it a material of choice for use in such chambers, its high resistivity has limited its use in fabricating components that require a greater degree of electrical conductivity.
High electrical resistivity of CVD-SiC has further restricted its use in applications that are subject to the buildup of static electricity. The need to ground components used in such applications requires that they possess greater electrical conductivity than is generally found in CVD-SiC. A low resistivity silicon carbide can provide a unique and useful combination of high temperature properties with suitable electrical conductivity properties for use in applications where grounding is required.
The semiconductor industry uses CVD-SiC components of different electrical resistivity. Different resistivity components provide different electrical coupling to plasma (i.e. absorbs different amounts of energy from the plasma) in plasma etch chambers. High resistivity SiC components, i.e., 1000 to 5000 ohm-cm, such as gas diffuser plates, do not absorb much energy from the plasma and thus are used in those areas of the etch chamber where plasma energy is not affected. In contrast, low resistivity components such as plasma screens and liners absorb energy from the plasma and thus prevent plasma from spreading beyond the components. If the plasma is permitted to spread beyond the low resistivity components, it will generate heat in the system which will degrade the equipment.
Regardless of whether the CVD-SiC is of a high or low electrical resistivity, a uniform resistivity is always desired. A uniform electrical resistivity provides for less variation in the performance of the SiC component whether it is functioning as a gas diffuser plate or as an edge ring. A SiC article with uniform resistivity also heats the components uniformly, thus reducing the temperature gradients and the thermal stresses in the material. A uniform electrical resistivity of a SiC component is less susceptible to cracking in extreme environments employed in manufacturing semiconductors such as in the extreme environments of rapid thermal processing (RTP).
U.S. patent application Ser. No. 09/790,442, filed Feb. 21, 2001, (non-provisional of provisionally filed U.S. application 60/184,766, filed Feb. 24, 2000), assigned to the assignee of the present application discloses a chemical vapor deposited low resistivity silicon carbide (CVD-LRSiC) and method of making the same. Electrical resistivity of the silicon carbide is 0.9 ohm-cm or less. In contrast, the electrical resistivity of relatively pure silicon carbide, prior to the CVD-LRSiC of the application Ser. No. 09/790,442, is in excess of 1000 ohm-cm. The method of preparing the CVD-LRSiC employs many of the same components as the CVD methods disclosed above except that nitrogen is also employed. The lower resistivity of the silicon carbide is believed to be attributable to a controlled amount of nitrogen throughout the silicon carbide as it is deposited by CVD. Controlled means that the nitrogen is maintained at a constant concentration during SiC deposition. The nitrogen is incorporated in the deposit by providing a controlled amount of nitrogen with the precursor gas in the gaseous mixture that is fed to the reaction zone adjacent a substrate. The reaction is carried out in an argon gas atmosphere. Nitrogen concentration in the gaseous reaction mixture does not exceed 32% by weight of the mixture. At such nitrogen concentrations, the physical properties of SiC, other than the electrical resistivity, do not change such as to affect performance of SiC articles in thermal processing applications. As the silicon carbide precursor reacts to form the silicon carbide deposit, nitrogen from the gaseous mixture is incorporated into the deposit. The CVD-LRSiC contains at least 6.3×1018 atoms of nitrogen per cubic centimeter of CVD-LRSiC. The electrical resistivity of the SiC was below 0.9 ohm-cm. Such low electrical resistivity is highly desirable and are suitable for use in thermal processing methods. However, the electrical resistivity of the SiC was not as uniform as the industry preferably desires. SiC samples ranged down to 0.1 ohm-cm with a mean electrical resistivity of around 0.52 ohm-cm with a variation around the mean of about 80%. Although such SiC is suitable for thermal processing methods, there is still a need for a SiC with a more uniform electrical resistivity and a lower variation around the mean.
U.S. patent application Ser. No. 10/000,975 filed Oct. 24, 2001 also assigned to the assignee of the present application discloses another chemical vapor deposited low resistivity silicon carbide article. The silicon carbide has an improved electrical resistivity of less than 0.10 ohm-cm and is opaque at wavelengths of from 0.1 μm to 1.0 μm at a temperature of at least 250° C. The improvements in the electrical resistivity as well as the opacity were achieved without compromising other SiC properties such as thermal conductivity, flexural strength and thermal stability. The improved electrical resistivity and other properties were achieved by increasing the nitrogen incorporated into the SiC. Nitrogen content reached 3×1019 atoms of nitrogen per cubic centimeter of SiC. Nitrogen content was increased by increasing nitrogen volume to as high as 50% in the deposition chamber. Surprisingly, the increase in nitrogen concentration did not compromise the thermal conductivity or other important SiC properties. Altering reaction components and chamber conditions may affect the stoichiometry of SiC reactants such that the resulting SiC may have reduced properties, such as thermal conductivity, and may be prone to cracking. Thus, a worker may not readily predict the quality of SiC that he may obtain by altering reaction parameters based on previous SiC synthesis processes.
While the resistivity of CVD-SiC can theoretically be lowered to a desired level by the introduction of a sufficient amount of impurities, such as boron, the resulting elevated levels of impurities adversely affect other properties of the SiC such as thermal conductivity and/or high temperature stability. The CVD-LRSiC is relatively free of impurities, containing less than 10 ppmw of impurity trace elements as determined by gas discharge mass spectroscopy. The CVD-LRSiC is further characterized by a thermal conductivity of at least 195 Watts/meter degree Kelvin (W/mK) and a flexural strength of at least 390 MPa.
The electrically conductive CVD-LRSiC possesses high temperature stability in addition to being a high purity SiC. Thus, the free standing CVD-LRSiC may be readily employed in high temperature furnaces such as semiconductor processing furnaces and plasma etching apparatus. The CVD-LRSiC may be sold as a bulk material or may be further processed by shaping, machining, polishing and the like to provide a more finished free-standing article. For example, the CVD-LRSiC may be machined into plasma screens, focus rings and susceptors or edge rings for semi-conductor wafer processing and other types of high temperature processing chamber furniture as well as other articles where CVD-LRSiC material is highly desirable.
In the manufacture of semi-conductor wafers, there are numerous process steps. One set of steps is referred to as epitaxial deposition, and generally consists of depositing a thin layer (from 10 to less than one micron) of epitaxial silicon upon the wafer. This is achieved using specialized equipment such as SiC wafer boats or SiC susceptors or edge rings to secure the semi-conductor wafers in processing chambers, and a chemical vapor deposition (CVD) process. The CVD process requires that the wafer be heated to very high temperatures, on the order of 1200° C. (2000° F.).
There has been a recent trend in the semi-conductor art to employ equipment that operates upon a single wafer, rather than a group of wafers. In single wafer equipment, the heating of the wafer to the CVD temperature is greatly accelerated such that the wafer is taken from about room temperature to an elevated temperature within 30 seconds. Such processing is known as rapid thermal processing or RTP. Rapid thermal processing (RTP), for example, is used for several different fabrication processes, including rapid thermal annealing (RTA), rapid thermal cleaning (RTC), rapid thermal chemical vapor deposition (RTCVD), rapid thermal oxidation (RTO), and rapid thermal nitridation (RTN). Temperatures in an RTP chamber may exceed 1100° C. and are subject to rapid change, thereby making precise control of the substrate temperature complicated and difficult. RTP includes depositing various thin films of different materials by an RTP-CVD process, rapid annealing of wafers (RTP thermal processing) and rapid oxidation to form silicon dioxide. While the silicon wafer can accept such rapid temperature change well, the wafer must be held in position by a susceptor or edge ring that can also withstand such rapid temperature changes. Susceptor or edge rings composed of CVD-SiC or CVD-LRSiC have proved very suitable for withstanding RTP conditions.
Many RTP systems employ high intensity tungsten (W) halogen lamps to heat semi-conductor wafers. Pyrometers are used to measure and to control wafer temperature by controlling the output of the W-halogen lamps. Accurate and repeatable temperature measurements for wafers over a wide range of values are imperative to provide quality wafers that meet the requirements for integrated circuit manufacturing. Accurate temperature measurement requires accurate radiometric measurements of wafer radiation. Background radiation from W-halogen lamps (filament temperature of 2500° C.) or from other sources can contribute to an erroneous temperature measurement by the pyrometer especially at low temperatures (400° C.) where the radiant emission from the wafer is very low compared to the lamp output. Also, any light from the W-halogen lamps that passes through (transmits) a susceptor or edge ring can cause an incorrect temperature reading by the pyrometer.
The industry has addressed the temperature problems by designing the RTP chamber with single sided heating and mounting the pyrometers on the chamber bottom opposite the light source. To further reduce light interference, the area under the wafer was made “light tight”, thus eliminating stray reflected light from entering the area under the wafer. In addition to redesigning the RTP chamber, CVD-SiC or CVD-LRSiC edge rings and susceptors were made more opaque to W-halogen lamp light in the wavelength range that pyrometers operate by coating the rings with about 200 μm (0.008 inches) of poly-silicon to reduce the lamp light that passes through the edge rings. Examples of such edge rings which are made more opaque to lamp light are disclosed in U.S. Pat. No. 6,048,403 and U.S. Pat. No. 6,200,388 B1. However, although opaqueness may be increased, coating edge rings with poly-silicon adds substantial cost to the edge rings. Further, the coating process (epitaxial silicon growth) has many technical problems associated with it such as dendritic growth, bread loafing around edges and purity problems that reduce yields. Poly-silicon coating adds thermal mass to the edge rings. The increased thermal mass limits heating ramp rates during RTP processing cycles. Ideally, edge rings have a thermal mass that is as low as possible to achieve the fastest heating ramp rates. The faster the ramp rate the shorter the processing cycle time for wafers, thus reducing wafer processing costs. Another advantage to faster ramp rates is that the total integrated time at high temperature for the wafers is reduced allowing for less diffusion of any dopant species employed during processing. Such is highly desirable as the feature sizes decrease for semi-conductor devices (trend in the semi-conductor industry).
Although there are CVD-LRSiC articles that may be employed in semi-conductor wafer processing chambers, there is still a need for improved CVD-LRSiC articles that have improved opaqueness and that do not need coatings to achieve a desired opaqueness. Additionally, there is also a need for CVD-LRSiC articles that have more uniform electrical resistivity.